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NXP Semiconductors /LPC43xx /GPDMA /INTTCSTAT

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Interpret as INTTCSTAT

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (INTTCSTAT0)INTTCSTAT0 0 (INTTCSTAT1)INTTCSTAT1 0 (INTTCSTAT2)INTTCSTAT2 0 (INTTCSTAT3)INTTCSTAT3 0 (INTTCSTAT4)INTTCSTAT4 0 (INTTCSTAT5)INTTCSTAT5 0 (INTTCSTAT6)INTTCSTAT6 0 (INTTCSTAT7)INTTCSTAT7 0RESERVED

Description

DMA Interrupt Terminal Count Request Status Register

Fields

INTTCSTAT0

Terminal count interrupt request status for DMA channels. Each bit represents one channel: 0 - the corresponding channel has no active terminal count interrupt request. 1 - the corresponding channel does have an active terminal count interrupt request.
INTTCSTAT1

Terminal count interrupt request status for DMA channels. Each bit represents one channel: 0 - the corresponding channel has no active terminal count interrupt request. 1 - the corresponding channel does have an active terminal count interrupt request.
INTTCSTAT2

Terminal count interrupt request status for DMA channels. Each bit represents one channel: 0 - the corresponding channel has no active terminal count interrupt request. 1 - the corresponding channel does have an active terminal count interrupt request.
INTTCSTAT3

Terminal count interrupt request status for DMA channels. Each bit represents one channel: 0 - the corresponding channel has no active terminal count interrupt request. 1 - the corresponding channel does have an active terminal count interrupt request.
INTTCSTAT4

Terminal count interrupt request status for DMA channels. Each bit represents one channel: 0 - the corresponding channel has no active terminal count interrupt request. 1 - the corresponding channel does have an active terminal count interrupt request.
INTTCSTAT5

Terminal count interrupt request status for DMA channels. Each bit represents one channel: 0 - the corresponding channel has no active terminal count interrupt request. 1 - the corresponding channel does have an active terminal count interrupt request.
INTTCSTAT6

Terminal count interrupt request status for DMA channels. Each bit represents one channel: 0 - the corresponding channel has no active terminal count interrupt request. 1 - the corresponding channel does have an active terminal count interrupt request.
INTTCSTAT7

Terminal count interrupt request status for DMA channels. Each bit represents one channel: 0 - the corresponding channel has no active terminal count interrupt request. 1 - the corresponding channel does have an active terminal count interrupt request.
RESERVED

Reserved. Read undefined.

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data